CMOS improvement has been achieved through strain engineering for mobility enhancement. For example, placing a strain in the channel region has been an effective approach to CMOS enhancement. This has been achieved by the deposition of a strain material near the channel of the device, e.g., material that would provide a tensile stress for NFET and a compressive stress for PFET.
However, as pitch continues to be scaled, strain materials are becoming less effective. For example, it has been found that fully-depleted-silicon-on-insulator (FDSOI) PFETs suffer low-mobility caused by strain relaxation at active/diffusion edges.